1. Technical Field
The technical field relates to a nonvolatile memory device using a nonvolatile memory capable of storing information of two or more bits in one memory cell, and to a memory controller to control the nonvolatile memory.
2. Related Art
Recently, a memory card having a nonvolatile memory has been widely used as memory device for a digital camera and a mobile phone. The memory card is required to have larger capacity so as to be able to correspond to a high pixel density of the digital camera and a usage such as recording of a moving image in the mobile phone. In order to meet the request of high capacity as described above, a multi-level cell has been developed in a memory cell constituting the nonvolatile memory. For example, when the memory cell is binarized, two-bit information can be stored in the one memory cell (hereinafter, this two bits are each referred to as the “bit sharing the memory cell”), so that the capacity of the nonvolatile memory can be double with the same number of memory cells.
However, the following problem arises in the multi-level cell. That is, since data is written to the multi-level cell bit by bit, already written one bit information could be destroyed due to power shutdown and the like occurring while data is written to the bit sharing the memory cell afterwards.
JP-A-2006-221743 and JP-A-2006-195565 disclose a technique to prevent data from being destroyed due to the power shutdown. For example, JP-A-2006-221743 employs a block in which a multi-level cell (four-value memory cell) can be used as a two-value memory cell. Thus, write data is once written to the block in which the multi-level cell can be used as the two-value memory, and copied in a multivalued memory block after a writing data has been correctly completed.
In addition, JP-A-2006-195565 discloses a technique to protect already written data in such a manner that data is not written to the bit which shares a memory cell with the already written data.
However, as for JP-A-2006-221743, since the data is written first in the two-value form and then, copied and written in the multivalued form, a size of the data to be written becomes double, so that a threefold size of the block for the writing is required, which lowers a write performance of the flash memory and deteriorates endurance characteristics.
As for JP-A-2006-195565, since the data is not written to the bit which shares the memory cell with the already written data, the capacity of the flash memory is wasted. In addition, JP-A-2006-195565 substantially has the problem that the data is destroyed due to the memory cell sharing during writing the data.
As described above, although the already written data can be prevented from being erased due to the memory cell sharing even when the power shutdown occurs at the time of writing, the above-described problem still exits in JP-A-2006-221743 and JP-A-2006-195565.
It is an object of the present invention to provide a memory controller capable of preventing already written data from being erased due to memory cell sharing even when power shutdown occurs at the time of writing, without causing the problem occurring in JP-A-2006-221743 and JP-A-2006-195565, in writing data in a nonvolatile memory including multi-level cells, and a nonvolatile memory device provided with the above memory controller.